Stress-engineered 0.34 nm graphene memristors for low-power probabilistic computing
In the authors' words
Memristors are promising for neuromorphic computing electronics, yet scaling is hindered by the difficulty of fabricating ordered nanoscale electrodes. Here, we report an angstrom-scale graphene-edge memristor with a geometrically defined 0.34 × 0.34 nm2 crossed-electrode area. Key to this achievement is our stress-distribution-based technique that enables intact graphene transfer onto smooth vertical sidewalls without damage. Combining this technique with chemical mechanical polishing and wafer-level bonding, we demonstrated an angstrom scaled memristor based on a geometrically defined 0.34 × 0.34 nm2 crossed-graphene-edge electrode area, which exhibits a switching ratio exceeding 103 and volatile characteristics. The device also demonstrated significant low-power (370 nW) potential in the demonstration of the probabilistic bits system. Our work establishes a viable strategy for high-density memristor arrays and introduces a mechanical approach for manipulating 2D materials in unconventional geometries and integrating them into next-generation nanodevices. Here, the authors report a stress engineering method to fabricate graphene-edge memristors with a geometrically defined 0.34 × 0.34 nm2 crossed-electrode area, showing volatile characteristics and their application for low-power probabilistic computing.
Appeared: Friday, September 25. Nature Communications. Peer-reviewed journal.